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Paper Title : Design And Implementation of A MIPS Processor with Signal Processing Extensions On FPGA

ISSN : 2395-1303
Year of Publication : 2022
10.5281/zenodo.6784193

Authors: Heba C Josy, Kelvin Tony, Krishnendu R, Liz Abraham

         


Abstract
The purpose of this paper is to design a single cycle central processing unit with signal processing extensions in an FPGA. The processor will be able to handle different instructions, including R-type, I-type and J- type. To the existing instruction set, we are going to include signal processing functions viz. Fast Fourier Transform (FFT). This design tries to meet the faster processing demand in consumer electronics. Also with this design easy debugging of architecture is possible and therefore making it an ideal teaching tool.

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Keywords
- Fast Fourier Transform, twiddle factor, Micro- processor without Interlocked Pipelined Stages