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Paper Title : A SURVEY ON 10-BIT PIPELINE ADC SUITABLE FOR VIDEO APPLICATIONS

ISSN : 2395-1303
Year of Publication : 2020
10.29126/23951303/IJET-V6I2P19

Authors:-M.Angel Jenifer

         


Abstract
A 10 bit low voltage low power pipelined ADCsuitable for a video application ispresented. The presented architecture utilizes a combination of parallel sampling technique and op-amp sharing technique. The architecture consists of several blocks such as amplifier,MUX,flashADC, reconstructionblock,T/H (Track and hold Amplifier) etc.T/His essential for multistage ADCs.Multiplexer is used to select any one of the parallel paths in parallel sampling technique.Reconstruction block helps to avoid excessive clipping noise and achieving good linearity.A flash ADC is a type of ADC that uses a linear voltage ladder with a comparator at each “rung” of the ladder to compare the input voltage to successive reference voltages. To achieve low power, a folded cascade OTA and low power dynamic comparator is used. In this design 10 bit pipelined ADCconsumes a total power of 18.0279mW.This design is implemented in 180nm technology using cadence software.

Reference
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Keywords
low power, parallel sampling MDAC, pipelinedADC, op-amp sharing MDAC, video applications.